Physical Design Engineer
A physical design engineer is responsible for the final assembly of all of the intellectual property needed for a chip. They take the various inputs such as netlists, analog block layouts, and timing files and create a physical representation of the final computer chip.A PDE uses complex software called place-and-route tools which take-in a netlist along with other miscellaneous files, and generates an on-screen representation of the thousands of cells required for the final design. At this point, they begin floorplanning, which involves fitting the various IP blocks together to optimize die size (area) and account for any design constraints such as placing a Firewire control circuit near the associated pads.
The PDE then uses an auto-placer which positions the cells according to various optimization algorithms in the software. This placement of the cells usually require manual adjustment by the engineer to fit odd-shaped blocks in, move things for power busses, and other tasks that the software cannot accomplish. After this step, all of the cell layouts will be positioned, but unconnected. The PDE can now use an auto-router which actually wires all of the cells together to implement the circuit. Additional manual editing may be required where the PDE will complete unroutable wires, add power bussing, and tidy everything up.
Some PDEs will do their own verification, such as LVS and DRC, but many will hand this section of the chip's design effort to a Physical Design Technician.
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